Experiences
- Effectively lead cross-functional technical efforts in areas like cache policy, power management, and quality of service involving chip design, architecture, software, and system teams
- Architect new hardware features to improve Apple’s ability to characterize real applications and build robust online control systems for power and performance management
- Help define and create tools and workflows to collect and derive insights from terabyte-scale hardware and software trace data from prototype Apple devices
- Use hardware and software analysis tools to perform feasibility analysis for future use cases, SoCs, and products
- Assist in complex debug efforts involving system software/SoC interactions
- Analyze performance and power characteristics and modelling for Deep Learning workloads on GPUs.
- Performed verification of multiple System-on-Chip peripherals, DMA, memory, and security subsystems
- Automated design and verification methodologies for consecutive spin devices for TI Wireless Connectivity products leading to an improved speed up of nearly 80 man-hours between each device
- Supervised and mentored a 2-month intern (Summer 2021); trained and mentored a new college graduate for 1 year (2020-21)
- Collaborated with the Applications team to provide quick software solutions for multiple client requirements and silicon bug resolutions based on the understanding of underlying hardware architecture
- Reviewed and fine-tuned specifications working with the architects and verification team for security peripherals, low-power cross-clock/power domain infrastructure, and Boot FW development for the microcontroller-based products
Evaluated solutions for performing analog defect-based test for Power management and Analog-to-Digital Converter modules
- Development of website comprising of various student, administrative and non-administrative modules
- System and network architecture design with auto deployment using Continuous Integration and Continuous Deployment (CI-CD)
- Worked with various stakeholders - faculties, university administration, non-technical staff to understand requirements and challenges faced in offline mode of work
- Mentored a team and worked on developing multiple modules and helping in seamless transition from the offline to the online mode of work
- Developed 22 functions for Signal Processing Toolbox as part of Scilab contributing to Free and Open-Source Software for Education (FOSSEE) organization
- Optimized 9 functions for use in microcontroller-based applications for low-power implementations
Awards / Research Grant
- Our team was awarded the ISIF Asia grant under the "Infrastructure" category for USD 240,000 in the year 2022.
- The Information Society Innovation Fund (ISIF Asia) is a competitive grant-giving mechanism in the Asia Pacific, administered by the APNIC Foundation. Selected on the basis of independent assessments by a panel of community experts, ISIF Asia supports organisations and initiatives that innovate, design, and implement solutions that further Internet and digital development, and in turn facilitate human and economic development in APAC.
- I was the co-author of the research grant proposal and research advisor for the project alongside the Project Lead Prof. Mohit Tahiliani.
Publications
- System-Level Observations: Identified critical issues with systemd-network overriding kernel-level IPv6 settings, requiring configuration changes in both sysctl and systemd-network to properly control router advertisement acceptance
- Vendor Limitations: Documented gaps in IPv6 support including lack of web filtering capabilities, missing BGP monitoring tools for IPv6, and Android devices requiring RDNSS instead of DHCPv6 for DNS configuration
- Major Achievement: Successfully migrated IRIS (most critical campus application) to IPv6 with impressive usage - over 12.7M IPv6 hits and 894K unique IPv6 addresses accessing the system, demonstrating substantial real-world IPv6 adoption
- Infrastructure Progress: Completed data center VLAN migration to IPv6, established DHCPv6 services, migrated VPN services (OpenVPN/WireGuard), and addressed complex Docker networking challenges for containerized services
- Technical Challenges: Documented specific issues with DHCPv6 filtering on TP-Link switches, neighbor discovery snooping complications, DNS scope configuration problems, and router advertisement acceptance behavior in Linux systems
- Scale and Infrastructure: Outlined the massive scope - 45,000+ terminals, 350+ switches, 1,200+ access points across a campus with 40km expansion planned, making this one of the larger academic IPv6 deployments
- Initial Results: Early IRIS migration showed 3.9M IPv6 hits with 210K unique addresses (40-day period), revealing interesting platform-specific usage patterns where iOS/macOS/Linux preferred IPv6 while Windows showed significant IPv4 preference
- Deployment Strategy: Established systematic approach using ISP's ASN rather than running own BGP, successful IPv6 block advertisement, and comprehensive testbed validation before production deployment
Projects
I focus on interdisciplinary domains like electronics, data systems, networks and architecture with my work targeting the hardware and software codesign.
- Studied datacenter tax on network and compression for clustered MongoDB setup on a benchmark suite to find hardware bottlenecks and propose optimization in underlying API usage for better L3 cache hit ratio.
- Proposed the use of existing solutions to reduce the application to kernel overhead for network operations and showed the benefit of using hardware accelerators where bulk data compression during the logging service can be beneficial
- Implement a traffic and bandwidth driven Network-on-Chip node placement algorithm on Fluid, a framework for defining Systems on FPGA using Python
- Bachelor's Major Project to implement power-optimised re-configurable CNN memory accelerator on FPGA
- Project aims to optimise power and speed with minimum impact on area for performing CNN operations
- Reduced heavy memory accesses using simpler yet effective weights and created alternate memory mapped cache path for CNN operations
- Team - Naadamaya (ID: 24725)
- Algorithmic beat tracking is a challenge for real-time implementation
- Developed causal beat tracking algorithm - includes onset detection, Beats Per Minute(BPM) estimation, beat phase estimation and beat prediction
- A self-motivated project to implement packet switching using GPUs
- Core networking functions such as lookups, hash calculation or encryption to be executed in parallel for multiple packets
- GPU implementation provided flexibility over ASIC implementations for new algorithm implementations
- Optimising CPU-GPU interactions, reduce DRAM access, faster lookups help in Named Data Networking (NDN) applications
- Funded Industrial collaboration project with Daimler India Commercial Vehicles Pvt. Ltd.
- Design and Development of an Automated Guided Vehicle
- Worked on the electronic controller board of the vehicle and designed PCB for the same
- Worked on understanding Human-Computer Interaction of workers and the AGV in an industrial setup to implement better safety hooks in the vehicle
- Development of a tablet with refreshable tactile interface to realise physical shapes and terrains to help visually challenged
- Prototype on dynamic 3-D surface formation inspired from MIT’s inFORM
- Team - 50Hz of India (ID: 24492) - Top 15 finalists worldwide
- Involved analyzing power signatures from multimedia recordings and classifying them into its respective power grids
- Electric Network Frequency (ENF), Feature extraction and classification
- Designed circuit to accurately capture the local electricity source waveform and correlate with audio recordings in same environment
Other Activities
- IEEE-HKN is the international honor society of the Institute of Electrical and Electronics Engineers(IEEE) for individuals who have distinguished themselves as students or as professionals in electrical engineering, computer engineering, computer science, and other fields of IEEE interest.
- I was one of six judges for national-level hackathon with participation from over 140 major engineering colleges across India. This event was sponsored by Wells Fargo, Devfolio, Codechef and more.
- The 2021 edition comprised themes related to Virtual Education, Wellness, Contactless alternatives (themed around COVID-19), Safer communities and more.